Add missing dt-bindings/include files needed for compilation of driver. Enable compilation of the CMN PLL driver by adding the symbols to Kconfig and Makefile.
Fixes: 468975a985ab ("qualcommax: ipq50xx: backport upstreamed patches for adding ipq5018 CMN PLL support") Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/21453 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: fdce6f9)
In IPQ5018, the reference clock to the CMN PLL block from the on-board Wi-Fi has its divider set to 2. This divider wasn't taken into consideration when calculating the CMN PLL clock rate which meant the resulting clock rate was doubled.
With the reference clock divider being accounted for in the driver, correct the assigned clock rate to 4.8GHz.
Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/21453 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: d6ab889)
qualcommax: ipq50xx: Correct USB DWC3 wrapper interrupts
Interrupts for DWC3 node were completely mixed up - SPI interrupt 62 is not listed in reference manual at all. It was also causing dtbs_check warnings:
ipq5018-rdp432-c2.dtb: usb@8af8800 (qcom,ipq5018-dwc3): interrupt-names:0: 'pwr_event' was expected ipq5018-rdp432-c2.dtb: usb@8af8800 (qcom,ipq5018-dwc3): interrupt-names: ['hs_phy_irq'] is too short
Warning itself was introduced by commit 53c6d854be4e ("dt-bindings: usb: dwc3: Clean up hs_phy_irq in binding"), but this was trying to bring sanity to the interrupts overall, although did a mistake for IPQ5018. IPQ5018 does not have QUSB2 PHY and its interrupts should rather match ones used in IPQ5332.
Correct it by using interrupts matching the bindings and reference manual.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://github.com/openwrt/openwrt/pull/21454 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: e1a9636)
Refactor the previously added SerDes reset sequence. Use the SerDes MDIO interface instead of plain writes into the switchcore's register space. Moreover, simplify the sequence because the SDK version is unnecessarily complex.
Add basic SerDes setup functionality which determines and sets the hardware mode of a SerDes, and does a SerDes reset. This is restricted to the 10G SerDes only as the 5G SerDes are setup properly by default. Further initialization will be needed for the modes to function properly
Add the SerDes setup hooks in the PCS driver for RTL839x so that pcs_config actually triggers configuration. Adjust the DTS of all devices accordingly by adding pcs-handles and dropping phy-handles.
There is a chance that the squashfs4 tool may create a broken image under certain conditions. Backport the fix from upstream to address this issue.
Report: https://forum.openwrt.org/t/bug-squashfs4-tools-4-7-4-create-corrupted-image/244894 Fixes: 64432358e098 ("tools/squashfs4: update to 4.7.3") Reported-by: Oleg S <remittor@gmail.com> Signed-off-by: Shiji Yang <yangshiji66@outlook.com> Link: https://github.com/openwrt/openwrt/pull/21458 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: d934298)
The patch that adds MT7987 support to the mtk-2p5ge driver does the following:
case MTK_2P5GPHY_ID_MT7987: phy_clear_bits_mmd MTK_PHY_LED_ON_POLARITY case MTK_2P5GPHY_ID_MT7988: phy_set_bits_mmd.. MTK_PHY_LED_ON_POLARITY
phy_set_bits_mmd... MTK_PHY_LED_ON_POLARITY | xxx
This clearly resulted in the LED polarity of the 2.5G PHY on the MT7987 being reversed. Remove redundant MMD operations to fix the 2.5G PHY LED error on Bananapi BPi-R4 Lite.
Fixes: d62fc50f ("mediatek: import patches from SDK to support MT7987 Ethernet") Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn> (commit: b5195cd)
realtek: phy: keep register state during RTL8214FC fibre check
Reading the fibre status of a RTL8214FC needs access to the page register (31) and the extended page register (30).
The current implementation has two issues.
- The extended page register is not restored after changes - Instead of register 30 its write-only sibling 29 is used.
This has the following side effect:
During regular polling kernel calls rtl8214fc_read_status and determines the media status via __rtl8214fc_media_is_fibre. Writing to register 29 a copy of that value is handed over to register 30. This makes use of mdio tools for the first port of the RTL8214FC hard. Register 30 is overwritten with zero every second.
Change access from register 29 to register 30 and adapt the sequence to restore register 30 contents at the end.
x86: switch from CONFIG_HZ_PERIODIC to CONFIG_NO_HZ_IDLE
Running with CONFIG_HZ_PERIODIC=y keeps the scheduler tick running continuously, which produces higher jitter and lower power efficiency. In contrast, CONFIG_NO_HZ_IDLE=y (the upstream default) stops the tick only when the CPU is idle, giving lower idle power and normal runtime jitter.
An Intel N150-based router/firewall was tested using two kernel builds: one with CONFIG_HZ_PERIODIC=y, and one with CONFIG_NO_HZ_IDLE=y. Power consumption was measured while the system was essentially idle (no meaningful traffic). The CONFIG_NO_HZ_IDLE=y build consistently used less power.
Details: The two power-measurement methods were:
1. PkgWatt from turbostat (software) 2. Wall-power measurement using a Kill-A-Watt (hardware)
The test began by zeroing the Kill-A-Watt and simultaneously running: turbostat --quiet --Summary --interval 10 --show Busy%,PkgWatt
The test duration was defined by the time required for the Kill-A-Watt to accumulate 0.005 kWh, after which the average wattage was calculated.
The mean PkgWatt difference is 210 mW (5.9%) in favor of CONFIG_NO_HZ_IDLE=y, with a t-statistic of ~3.17 and p ≈ 0.002.
Wall-power measurements show a 470 mW (3.77%) reduction under CONFIG_NO_HZ_IDLE=y.
Signed-off-by: John Audia <therealgraysky@proton.me> Link: https://github.com/openwrt/openwrt/pull/21470 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: 92ff3df)
kernel: net: phy: mxl-gpy: replace downstream SGMII AN hack
Replace downstream hack disabling SGMII in-band AN on the MediaTek platform with pending upstream patch announcing in-band AN capabilities and implementing configuring in-band AN in the PHY driver.
Signed-off-by: Daniel Golle <daniel@makrotopia.org> (commit: e5812c7)
This package adds initial u-boot support for qoriq target.
U-boot for qoriq devices must be compiled with 32-bit compiler and linked with 32-bit linker. It's part of mpc 85xx target. But qoriq target is 64-bit. As workaround, mpc85xx binary toolchain is downloaded only for this u-boot.
This commit adds the sysupgrade and factory images for T4240RDB board in both variants: - nor: for booting and read whole system from NOR memory - sdboot: for booting and read whole system from SD card
SD Card images install:
- Burn image to sdcard. E.g: gunzip -c gunzip -c openwrt-qoriq-generic-fsl_T4240RDB-squashfs-sdcard.img.gz | \ sudo dd of=/dev/mmcblk0 conv=fsync,notrunc status=progress bs=4M && sync - Download lastest Cortina PHY firmware from NXP github [1], if you accept their EULA [2]. - Install Cortina PHY on image, E.g: dd if=cs4315-cs4340-PHY-ucode.txt of=/dev/mmcblk0 bs=1 seek=2M - Insert SD-Card to SD slot - Switch SW3.4 to OFF - Configre mac addresses from sticker in u-boot. E.g: setenv ethaddr 00:10:f3:3a:a8:66 setenv eth1addr 00:10:f3:3a:a8:67 setenv eth2addr 00:10:f3:3a:a8:68 setenv eth3addr 00:10:f3:3a:a8:69 setenv eth4addr 00:10:f3:3a:a8:6a setenv eth5addr 00:10:f3:3a:a8:6b setenv eth6addr 00:10:f3:3a:a8:6c setenv eth7addr 00:10:f3:3a:a8:6d setenv eth8addr 00:10:f3:3a:a8:6e setenv eth9addr 00:10:f3:3a:a8:6f setenv eth10addr 00:10:f3:3a:a8:70 setenv eth11addr 00:10:f3:3a:a8:71 saveenv - reset and boot
NOR images install:
- download and extract factory image on tftp server root - boot device and stop in u-boot (from nor or sd card u-boot) - configure server and ip address. E.g: setenv ipaddr 192.168.1.2 setenv serverip 192.168.1.1 - Download image and run flashing: tftpboot $loadaddr openwrt-qoriq-generic-fsl_T4240RDB-squashfs-factory-nor.bin protect off all erase $fwaddr +$filesize cp.b $loadaddr $fwaddr $filesize - Switch SW3.4 to ON - Switch SW3.1-3 to OFF - reboot - Do postprocessing (see bellow)
NOR images post processing:
- Configre mac addresses from sticker in u-boot. E.g: setenv ethaddr 00:10:f3:3a:a8:66 setenv eth1addr 00:10:f3:3a:a8:67 setenv eth2addr 00:10:f3:3a:a8:68 setenv eth3addr 00:10:f3:3a:a8:69 setenv eth4addr 00:10:f3:3a:a8:6a setenv eth5addr 00:10:f3:3a:a8:6b setenv eth6addr 00:10:f3:3a:a8:6c setenv eth7addr 00:10:f3:3a:a8:6d setenv eth8addr 00:10:f3:3a:a8:6e setenv eth9addr 00:10:f3:3a:a8:6f setenv eth10addr 00:10:f3:3a:a8:70 setenv eth11addr 00:10:f3:3a:a8:71 saveenv - boot - Download and refresh RCW stored in eeprom: tr '\0' '\377' < /dev/zero | dd bs=256 of=/sys/bus/i2c/devices/0-0050/eeprom cat /tmp/openwrt-qoriq-generic-fsl_T4240RDB-squashfs-rcw.bin > /sys/bus/i2c/devices/0-0050/eeprom - Download lastest Cortina PHY firmware from NXP github [1], if you accept their EULA [2]. - Install Cortina PHY on image, E.g: mtd write cs4315-cs4340-PHY-ucode.txt /dev/mtd4 - reset and boot
The SerDes access functionality in the mdio-realtek-otto drivers was meant to be temporary, at least from a certain point on. The user was all the SerDes configuration that lived in the PHY and DSA drivers.
Now that SerDes configuration has moved completely to the PCS driver, there is no user of this code anymore. Instead, the PCS driver uses a separate driver 'mdio-realtek-otto-serdes' to access the SerDes. Thus, drop all that unused functionality from the "normal" mdio driver.
Specifications: * CPU: Microchip LAN9696 switch SoC * DRAM: 2GB DDR4 * Storage: * 32MB QSPI NOR * 16GB eMMC * Networking: * 24 x 10/100/1000 RJ45 via LAN8804 Quad PHY-s over QSGMII * 4 x 100/1000/2500/5000/10000 SFP+ ports * 1 x 10/100/1000 management RJ45 via LAN8840 PHY over RGMII (U-Boot too) * USB: 1 x USB2.0 Type-A * Management via USB-C (MCP2200): * UART @ 115200 baud (Default), 921600 possible * GPIO-s for bootstrap and reset * LED-s: * 2 per networking port (Green and Yellow) * Green status LED * Soft reset GPIO * Power: 12V DC barrel jack * External PoE: * Option for PoE add-on * Temperature Sensors: * TMP1075 onboard * CPU temperature * Microchip MCP79402 RTC with battery back-up * Microchip ATECC608C secure peripheral * CPU heatsink with PWM fan * Onboard header for case fan
Installation instructions:
1. Connect to UART via the USB-C port 2. Connect the management port 3. Boot and interrupt U-Boot 4. TFTP the OpenWrt initramfs image and boot it 5. SCP the OpenWrt eMMC GPT image to a running OpenWrt initramfs to /tmp openwrt-microchipsw-lan969x-novarq_tactical-1000-squashfs-emmc-gpt.img.gz
And decompress it via: gzip -d /tmp/openwrt-microchipsw-lan969x-novarq_tactical-1000-squashfs-emmc-gpt.img.gz
The ethernet driver must initialize the chip for proper operation. Currently there exist functions for RTL838x, RTL839x and RTL931x. All of them are called differently. Combine them in a central call location.
realtek: eth: move init_mac() into configuration structure
Avoid family checks where possible. Now that the init_mac() functions are in perfect shape include them into the configuration structure. While we are here rename them to the new driver prefix.
Installation via bootloader: * open serial console (baud rate 115200) * interrupt boot process by pressing any key during boot * boot the OpenWrt initramfs: # rtk network on # tftpboot 0x8f000000 /tftpboot/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-initramfs-kernel.bin # bootm * copy openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-sysupgrade.bin to /tmp and use sysupgrade to install it: # sysupgrade /tmp/openwrt-realtek-rtl839x-edgecore_ecs4100-12ph-squashfs-sysupgrade.bin
Even though U-Boot claims the switch is based on the RTL8392M SoC, my device is based on the RTL8393M SoC. I have confirmed this by removing the heatsink, and the Linux kernel agrees with this. Therefore the DTS has the rtl8393_ prefix.
netifd: dhcp: suppress udhcpc default vendor class if specified in sendopts
When DHCP Option 60 is specified via sendopts (hex, decimal, or named formats), udhcpc sends its default "udhcp <version>" string alongside the custom value, which causes authentication failures with some ISPs.
This fix detects Option 60 in sendopts and automatically passes -V "" to udhcpc to suppress the default version string while allowing multiple user-defined vendor classes.
1. Obtain the original MAC address table from the stock bootlog, for example:
setting device eth0 to 00:90:7f:00:00:01 setting device eth1 to 00:90:7f:00:00:02 setting device eth2 to 00:90:7f:00:00:03 setting device eth3 to 00:90:7f:00:00:04 setting device eth4 to 00:90:7f:00:00:05 setting device eth5 to 00:90:7f:00:00:06 setting device eth6 to 00:90:7f:00:00:07
2. Open the case and move jumper JP1 from 2-3 to 1-2 to enter FAILSAFE mode. 3. Power on the device and interrupt the boot process to access the U-Boot shell. 4. Program the MAC base address into the EEPROM (text after '#' is a comment):
mac ports 3 mac 2 00:90:7f:00:00:01 # first MAC address from bootlog mac save
5. Reset the device and enter the U-Boot console again. 6. Connect a TFTP server to port 6 and boot the initramfs image:
7. (Optional) Backup all MTD partitions if you want the ability to restore stock firmware. 8. Perform a normal sysupgrade from the initramfs environment. 9. Power off the device and move jumper JP1 back to 2-3. 10. The device will now boot OpenWrt.
Known issues: - LCD, buttons and LEDs are controlled by an external MCU; the protocol is currently unknown. - The internal connection between the two Marvell switches is unused by OpenWrt. - The stock firmware uses an empty U-Boot environment; saving variables modifies the environment and prevents a normal boot. FAILSAFE U-Boot remains functional. - WatchGuard configuration is encrypted; DSA MAC addresses are stored in this configuration. - Failsafe Ethernet works on port1.
Works: ------ - (24) RJ-45 ethernet ports - Switch functions - Buttons - LEDs (partial support, the wrong LEDs light up) - Manual fan control
Not yet enabled: ---------------- - PoE (requires patches to realtek-poe to support i2c) - Combo ports (link is up, but no data is transferred)
Fans: ----- After boot, the fans are running in full speed mode. You can interact with the fan controller at /sys/class/hwmon/
Installation: -------------
This device uses ZyNOS instead of Linux, this makes installation a bit more cumbersome. Serial console is required!
1. Set the switch to boot from the first image. This step is crucial, it will fail to boot if this is not set properly.
2. Connect to the switch using serial and interrupt the boot process to enter debug/recovery mode.
3. Load the OpenWrt initramfs image via XMODEM. You need to obtain an unlock code, based on your MAC address, first. See the excellent write up at https://www.ixo.de/info/zyxel_uclinux/ for details. Replace unlock_code in the commands below by the code obtained. After running ATBA5, the terminal needs to be closed and re-opened with 115200 baud. This speeds up the file transfer significantly! The file length in bytes need to be given instead of file_length below. You also need an XMODEM upload utility like "lrzsz-sx -X" to transfer the file. Start the XMODEM upload after running the ATUPxxxx command:
NB: You do not need to touch the loader binary unless it's recommended. The loader is not part of a regular sysupgrade file and will be left untouched. The boot loader only checks if the loader is valid to be able to boot.
Recovery/ Return to stock: --------------------------
Just spam the "u" key during (or "z" for 9600 baud) during memory testing to trigger a recovery XMODEM upload at 115200 baud. A standard OEM upgrade image works properly.
Remove some unused defines for SerDes in the ethernet driver. They have been missed before but are completely out of place here now.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://github.com/openwrt/openwrt/pull/21481 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: 0917569)
realtek: phy: add comment to firmware file definition
Add a comment stating the situation around a specific RTL838x firmware file. After SerDes setup has been moved to the PCS driver, this firmware file is partially unused. If the remaining bits are pulled out or just replaced, this firmware file can be dropped. The comment ensures that we do not forget about that.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://github.com/openwrt/openwrt/pull/21481 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: dc78b80)
We finally reached the point where PCS has full control over SerDes and no parts of this are scattered in other drivers anymore. To make that clear, drop the comment in pcs_config that explains this former state and remove a warning which states that pcs_config isn't fully implemented yet.
Add a generic output to at least keep a generic sign of life from the PCS driver, independently from what the variant-specific code currently prints.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://github.com/openwrt/openwrt/pull/21481 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: f474538)
Switch RTL838X SerDes setup to use the internal SerDes hardware modes instead of the PHY_INTERFACE_MODE_* modes.
Use the generic mapper in the beginning of the SerDes setup and convert all affected functions to the different mode type. This will be moved out to the generic pcs_config later.
Signed-off-by: Jonas Jelonek <jelonek.jonas@gmail.com> Link: https://github.com/openwrt/openwrt/pull/21480 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: e4fd28e)
Commit ab805ec316b5 ("generic: add missing squashfs config") enabled CONFIG_SQUASHFS_DECOMP_MULTI_PERCPU in the generic config, so it is no longer needed in the target configs.
Signed-off-by: Stijn Tintel <stijn@linux-ipv6.be> Link: https://github.com/openwrt/openwrt/pull/21465 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: f7c5334)
They are being default enabled unconditionally when they should depend on 802.11k. 802.11k should not be enabled by default either as it can cause issues with certain older drivers and is useless without a userspace program like usteer or DAWN.
If users want to enable 802.11k they will enable it when they set such programs up.
Another inconsistency with rnr was dealt with so that it is not default enabled. This is also not done with old wifi-scripts and is generally unexpected and surprising behavior.
Moreoever, this introduces an inconsistency between old shell wifi-scripts and ucode version. Old wifi-scripts does not do this.
Signed-off-by: Rany Hany <rany_hany@riseup.net> Link: https://github.com/openwrt/openwrt/pull/21425 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: ee60b65)
Introduce the kmod-pmbus-sensors package to provide the generic PMBus hwmon driver (CONFIG_SENSORS_PMBUS).
This enables support for a wide range of PMBus-based devices including ADP4000, BMR310, BMR480, MAX20796, TPS544B25, and others.
Signed-off-by: Til Kaiser <mail@tk154.de> Link: https://github.com/openwrt/openwrt/pull/21444 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: 9653fd4)
wifi-scripts: move no_probe_resp_if_max_sta to wifi-iface
It is a BSS-level option and not radio-level. As such, move it to wifi-iface and ap.uc.
Signed-off-by: Rany Hany <rany_hany@riseup.net> Link: https://github.com/openwrt/openwrt/pull/21412 Signed-off-by: Robert Marko <robimarko@gmail.com> (commit: 9b1b5a6)
